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Hardware verification languages
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41	TESLA: Temporally Enhanced System Logic Assertions Jonathan Anderson Robert N. M. Watson David Chisnall Khilan Gudka Ilias Marinos Brooks Davis Add to Reading List Source URL: www.cl.cam.ac.uk Language: English - Date: 2014-04-15 11:46:35 Hardware verification languages Assertion Debugging Logic in computer science Tesla Roadster Clang Rust C E Software engineering Computing Computer programming
42	Datasheet VCS Functional Verification Choice of Leading SoC Design Teams Overview Add to Reading List Source URL: www.synopsys.com Language: English - Date: 2014-11-07 14:41:22 Hardware description languages SystemVerilog OpenVera E Functional verification Synopsys Open Verification Methodology Verilog Logic simulation Electronic engineering Electronic design automation Hardware verification languages
43	Synopsys Professional Services Datasheet SoC Integration & Verification At-A-Glance `` Add to Reading List Source URL: www.synopsys.com Language: English - Date: 2014-11-07 12:40:10 Hillsboro Oregon Synopsys SystemVerilog Physical design Functional verification E OpenVera Virtual Socket Interface Alliance Electronic engineering Electronic design automation Hardware verification languages
44	LusSy: A Toolbox for the Analysis of Systems-on-a-Chip at the Transactional Level M. Moy STMicroelectronics, Verimag Add to Reading List Source URL: www-verimag.imag.fr Language: English - Date: 2005-05-13 07:59:35 Hardware verification languages SystemC High-level synthesis Dataflow programming E SpecC Scheduling Catapult C Transaction-level modeling Electronic engineering Electronic design automation Hardware description languages
45	Software Tools for Technology Transfer manuscript No. (will be inserted by the editor) VeriTech - A Framework for Translating among Model Description Notations Orna Grumberg and Shmuel Katz Add to Reading List Source URL: www.cs.technion.ac.il Language: English - Date: 2005-11-29 05:50:59 Electronic engineering Formal methods Predicate logic Hardware description languages Construction and Analysis of Distributed Processes Formal verification State transition system Model checking Petri net Models of computation Theoretical computer science Concurrency
46	INSTITUT NATIONAL POLYTECHNIQUE DE GRENOBLE THESIS To obtain the grade of INPG DOCTOR Speciality: « COMPUTER SYSTEMS AND COMMUNICATIONS » Add to Reading List Source URL: www-verimag.imag.fr Language: English - Date: 2009-09-03 04:49:14 Model checking Parallel computing E Electronic engineering Hardware verification languages SystemC
47	AutoProof: Auto-active Functional Verification of Object-oriented Programs Julian Tschannen, Carlo A. Furia, Martin Nordio, and Nadia Polikarpova Chair of Software Engineering, Department of Computer Science, ETH Zurich, Add to Reading List Source URL: se.inf.ethz.ch Language: English - Date: 2015-01-15 04:33:24 Logic in computer science Object-oriented programming Formal methods Programming paradigms Eiffel Hardware verification languages Java Modeling Language Formal verification Postcondition Software engineering Computing Computer programming
48	Datasheet Formality and Formality Ultra Equivalence Checking for DC Ultra and Design Compiler Graphical Overview Add to Reading List Source URL: www.synopsys.com Language: English - Date: 2015-02-18 15:15:30 Formal methods Physical design SystemVerilog Synopsys Formal verification Verilog Formal equivalence checking Signoff Electronic engineering Electronic design automation Hardware description languages
49	White Paper Hierarchal Testbench Configuration Using uvm_config_db June 2014 Add to Reading List Source URL: www.synopsys.com Language: English - Date: 2014-11-07 12:39:15 E University of Vermont Universal Verification Methodology Chittenden County Vermont Hardware verification languages Vermont
50	Datasheet VCS Xprop Increasing the Efficiency of X-related Simulation and Debug Overview Add to Reading List Source URL: www.synopsys.com Language: English - Date: 2014-11-07 14:41:23 Hardware verification languages Digital electronics Verilog VHDL Logic simulation Register-transfer level SystemC Logic synthesis Synopsys Electronic engineering Electronic design automation Hardware description languages

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